1. Field of the Invention
This invention relates to an alignment method in an optical exposing process for a semiconductor device, and more particularly a new advanced global alignment method.
2. Description of Related Art
In the trend of increasingly high integration of VLSI and large-sized chips in recent years, the requirement for position alignment accuracy in a stepping device has become more and more severe. As for LSI such as 64M DRAM or 16M SRAM being developed at present time with a class of design rule of 0.35 .mu.m, in the case that a mean value of positional displacement in alignment is defined as X.sub.ave and a standard deviation is defined as .sigma., a high accuracy in position alignment having 0.1 .mu.m or less as a target value of .vertline.X.sub.ave .vertline.+3.sigma. is required for an entire surface of the wafer. In this case, an appendix letter of "ave" means a mean value.
The optical exposing operation for the LSI chip in the related art stepping device is carried out in a way of chasing a grid pattern under a stepping operation of a wafer stage. Then, in order to form a second pattern on a first pattern already formed on the wafer, a resist is formed on the first pattern, thereafter the resist is exposed under an application of reticle having the second pattern formed thereon. During this optical exposing operation, the positions of the wafer alignment marks (hereinafter merely called as alignment marks) associated with the first pattern for each of the optical exposing shots already formed on the wafer are measured by an alignment sensing system. Accordingly, an improvement of high precision alignment capability is required for hardware of the stepping device and in turn in order to make the most preferable alignment at each of the optical exposing shots, it is also necessary to improve alignment operation such as a statistical correction against the alignment.
As one kind of alignment correction in the related art stepping device, there is an advanced global alignment process (hereinafter called alignment method). This alignment method is an alignment system in which a wafer stage of the stepping device is moved to an exposing position in response to a statistical estimating calculation in reference to positional information of a plurality of alignment marks. A summary of a principle of this advanced global alignment method will be described as follows.
In the case that a second pattern is formed on the first pattern already formed, prior to this formation, the positions of the alignment marks associated with the first pattern for each of the optical exposing shots already formed on the wafer are measured by the alignment sensing system in reference to the wafer stage. Then, as shown in FIG. 1 and described in detail as follows, an optical exposing shot layout is converted in such a manner that a positional displacement between the positions of the rational grid points (hereinafter sometimes merely called as rational grid points) corresponding to each of the alignment marks and the measured position of each of the alignment marks may become minimum, thereafter alignment operation is performed to make an optical exposure of the resist. In FIG. 1, rational grid points are connected by solid lines, measured positions of each of the alignment marks are connected by dotted lines and the points after conversion of the optical exposing shot layouts (rational grid points) are connected by alternate long and short dash lines.
At present, a certain one rational grid point will be studied. The measured coordinates of the alignment mark corresponding to this rational grid point is defined as a.sub.M (X.sub.M, Y.sub.M) (refer to FIG. 2). In turn, the coordinates of the rational grid point on the wafer corresponding to this alignment mark is defined as a.sub.L (X.sub.L, Y.sub.L). In the specification, when an appendix letter of "v" is added to a symbol or the like, this means a vector. In the case that the wafer is processed with a heat treatment or passed through various film forming steps or the like, the coordinates a.sub.L (X.sub.L, Y.sub.L) is not usually coincided with the coordinates a.sub.M (X.sub.M, Y.sub.M). If the measurement accuracy of the alignment marks can be ignored, a vector (a.sub.MV -a.sub.LV) which is a difference between a vector a.sub.MV and a vector a.sub.LV is a vector indicating a positional displacement from the rational grid points caused by a deformation of the wafer made by the manufacturing process of a semiconductor device or a positional displacement at the wafer stage during loading of the wafer (positional displacement after pre-alignment of the wafer).
Accordingly, in the case that the alignment is carried out, a conversion operation with a certain kind of conversion operand A is performed against a certain point a.sub.L on the rational grid point and then a residual vector e.sub.V between the vector a.sub.TV =Aa.sub.Lv and the vector a.sub.Mv of the obtained point is calculated. Such an operation as above is carried out for a plurality of alignment marks (the number N). It is satisfactory that the conversion operand A is determined in such a way that a sum of the residual vector e.sub.v at each of the alignment marks may become minimum. Then, it is satisfactory that the coordinates a.sub.L of the rational grid point is converted into a coordinates a.sub.T in response to the conversion operand A, an alignment operation is carried out in response to the converted coordinates a.sub.T and an optical exposing shot is carried out to optically expose the resist.
More practically, the wafer stage system is operated such that an alignment displacement between the first pattern and the second pattern may become minimum in response to a positional displacement from the rational grid point of the measured alignment marks and the optical exposing shot layout for use in forming the second pattern is exposed while being displaced from the rational grid point.
Although a deformation of the wafer caused by a manufacturing process for the actual semiconductor device is complex, the following causes may be considered as the major causes:
(A) Offsets (shifts) dx and dy which are errors of the alignment marks in the directions X and Y, respectively. PA1 (B) A rotation .theta. which is an error of the alignment mark in its rotating direction. PA1 (C) An orthogonal degree of layout .alpha. which is an error in an orthogonal degree in a layout of each of the alignment marks, and PA1 (D) Scalings S.sub.x, S.sub.y which are variation in multiplication factor of each of the alignment marks in the directions X and Y, respectively. PA1 a=1+S.sub.X PA1 b=.alpha.+.theta. PA1 c=dx PA1 d=-.theta. PA1 e=1+S.sub.Y PA1 f=dy
These technical concepts are illustrated in FIGS. 3A, 3B, 4A and 4B. Both (A) offsets (refer to FIG. 3A) and (B) rotation (refer to FIG. 3B) are caused by a loading of the wafer into the wafer stage. (C) orthogonal degree of layout (refer to FIG. 4A) is caused by an accuracy of the wafer stage when the first pattern is optically exposed. (D) scaling (refer to FIG. 4B) is caused by a manufacturing process element of a semiconductor device such as a film formation stage and the like. These causes (A) to (D) may not be necessarily separated in a clear manner. In FIGS. 3A, 3B, 4A and 4B, the rational grid points are connected by solid lines and the alignment marks on the deformed wafer are connected by dotted lines.
The related art stepping device performs a correction of alignment with these four causes being applied as major causes of variation. That is, the variation operand A is determined with the method of least squares in such a way that a sum of squares of residual of displacement between the coordinates of the alignment marks measured and the coordinates after the coordinates of the rational grid points corresponding to such alignment marks may become minimum in response to these causes. Then, an optical exposing shot layout for use in forming the second pattern is determined in response to the positional coordinates of the alignment marks (positional coordinates after correction of the alignment marks) obtained through a converting operation based on the conversion operand A.
The conversion operation related to each of the causes is expressed with a 2.times.2 matrix and the conversion operation of ##EQU1## is carried out for (A) offset, where dx and dy are errors (offsets) of the alignment marks in the directions X and Y, respectively. X.sub.Ti and Y.sub.Ti in the equation above are meant by the X coordinate and Y coordinate of the alignment mark a.sub.Ti of the i-th order [i=0 to (N-1)] after conversion. X.sub.Li and Y.sub.Li are meant by the X coordinate and Y coordinate of the rational grid point a.sub.Li of the i-th order [i=0 to (N-1)]. Similar relation is applied to the following equation.
As for the (B) rotation, the converting operation based on ##EQU2## is carried out, where .theta. is an angle of rotation (unit: radian) and a value of .theta. during an actual alignment mark operation is in an order of 10.sup.-6 radian. Accordingly, there is no problem when sin.theta.=.theta. and cos.theta.=1 are set to be approximate to each other and the above equation can be attained.
In addition, as for (C) orthogonal degree of layout, the converting operation with the following equation ##EQU3## is carried out, where .alpha. expresses an orthogonal degree of layout (unit: radian) and a value of this .alpha. is 10.sup.-6 radian during an actual alignment mark operation. Accordingly, there is no problem if tan.alpha.=.alpha. is approximated, resulting in that the above equation may be obtained.
In turn, as for (D) scaling, the following conversion of ##EQU4## is carried out, where S.sub.X, S.sub.Y are values of scaling in the directions X and Y, respectively, and an order to become problem is a level of about 1 ppm.
In addition, assuming of complex of three converting operations of the equations (8), (9) and (10) mat result in the following equation, i.e. ##EQU5## Since it may be assumed that (.alpha.+.theta.)S.sub.Y =0, .theta..multidot.S.sub.X =0 and .alpha..multidot..theta.=0 can be attained, the equation (11) is changed and the following equation can be attained. ##EQU6##
Under such approximate conditions as above, these three converting operations can be converted. In addition, the coordinates a.sub.Ti (X.sub.Ti, Y.sub.Ti) after correction of alignment (after converting operation) can be simply expressed under an assumption of positional displacements dx and dy caused by offset as follows; EQU X.sub.Ti =(1+S.sub.x)X.sub.Li +(.alpha.+.theta.)Y.sub.Li +dxEquation (13-1) EQU Y.sub.Ti =-.theta.X.sub.Li +(1+S.sub.Y)Y.sub.Li +dy Equation (13-2)
In this case, if it is assumed that
the equations (13-1) and (13-2) can be expressed as the following equations (14-1) and (14-2). EQU X.sub.Ti =aX.sub.Li +bY.sub.Li +c Equation (14-1) EQU Y.sub.Ti =dX.sub.Li +eY.sub.Li +f Equation (14-2)
Accordingly, if the measured coordinates of the i-th order of alignment mark are defined as a.sub.Mi (X.sub.Mi, YMi), the residual values E.sub.Xi and E.sub.Yi can be expressed as follows: ##EQU7## Then, coefficients a, b, c, d, e and f are determined in such a way that a sum of square of each of the residual values E.sub.Xi and E.sub.Yi concerning the alignment marks of the number of N ranging from 0-th alignment mark to the (N-1)-th alignment mark, i.e. EQU .SIGMA.E.sub.Xi.sup.2 =.SIGMA.[X.sub.Mi -(aX.sub.Li +bY.sub.Li +c)].sup.2 EQU .SIGMA.E.sub.Yi.sup.2 =.SIGMA.[Y.sub.Mi -(dX.sub.Li +eY.sub.Li +f)].sup.2
may become minimum. Such a method as described above is the related art alignment method. That is, it is generally known that a proper amount of correction against each of the causes can be determined unconditionally through a method of least squares. In the present specification, the item ".SIGMA." is meant by a sum of a physical amount (expressed by the equation subsequent to .SIGMA.) concerning the alignment marks of the number of N ranging from 0-th alignment mark to (N-1)-th alignment mark unless otherwise specified. Each of the coefficients is partially differentiated and put in order as follows. ##EQU8## Accordingly, in reference to the equations (16-1) and (16-2), ##EQU9## may be attained. If B is defined as ##EQU10## each of the above two equations becomes ##EQU11## and it is possible to calculate six coefficients a, b, c, d, e and f. That is, it is possible to determine unconditionally the alignment coefficients dx, dy, .theta., .alpha., S.sub.x, S.sub.y. In other words, it is possible to analyze causes of the alignment displacement.
That is, it is well known in the related art alignment method that the most preferable correction of the alignment can be performed more easily and analytically in view of a technical concept of making sum of least squares of the residual values E.sub.Xi and E.sub.Yi through application of a method of least squares. That is, it is known that the most preferable correcting amount in alignment for making a sum of squares of residuals E.sub.Xi, E.sub.Yi minimum can be analytically calculated only through getting an inverse matrix of the matrix B. Then, finally the residuals may result in only random components or high degree component of scaling which can not be corrected in view of principle.
Such a related art alignment method as described above is effective in the case that the random components which cannot be corrected by hardware normally installed on the stepping device in view of its principle are relatively near a normal distribution. However, in view of the actual structure of the semiconductor device, minimum setting of the sum of squares of residuals is not necessarily a necessary condition and may not necessarily make the most preferable correcting amount of alignment.
The alignment operation in the practical semiconductor device is defined as an operation in which two patterns designed in reference to an alignment displacement tolerance value set in response to an alignment accuracy which can be attained are overlapped from each other. Normally, the first pre-formed pattern shown in FIG. 15A (for example, an electrical wiring pattern) is designed to be larger than the second pattern (for example, a contact hole pattern) in reference to a displacement in alignment as shown in FIG. 15B. In this figure, the lengths tol.sub.X and tol.sub.Y designate alignment displacement tolerance values in the directions X and Y, and the alignment displacement values in the directions X and Y are designated by .DELTA.X and .DELTA.Y, respectively. Accordingly, it may easily be understood that necessary and sufficient condition of alignment in manufacturing the semiconductor device consists in the fact that EQU .DELTA.X&lt;tol.sub.X Equation ( 20-1) EQU .DELTA.Y&lt;tol.sub.Y Equation ( 20-2)
are fulfilled for all patterns. In other words, it is satisfactory that all the second patterns to be formed satisfy the equations (20-1) and (20-2), respectively. In turn, in the case that even a part of the second pattern is exposed out of the first pattern, i.e. even a part of the second pattern to be formed does not satisfy the equation (20-1) or (20-2), it becomes impossible to form a normal electrical contact, for example. In other words, it is necessary that an absolute value of difference between a positional coordinate after correction of the alignment mark and a measured coordinate of the alignment mark is set to be smaller than tol.sub.X and tol.sub.Y.
However, it is not always found that a condition in which a sum of squares of residuals E.sub.Xi, E.sub.Yi in the related art alignment method is made minimum is a condition capable of attaining the maximum number of normal contact holes or a condition in which all contact holes are normally formed. In other words, the condition in which the sum of squares of residuals E.sub.Xi, E.sub.Yi is made minimum is not always coincided with the most preferable correcting condition of the alignment in the manufacturing of the semiconductor device.
In turn, even if the sum of squares of the residuals E.sub.Xi, E.sub.Yi is not made minimum, there is an alignment condition to provide the most preferable alignment result in the manufacturing of a semiconductor device. In particular, in the case that the random component in the displacement component of the alignment mark from the rational grid point does not follow a so-called normal distribution, the related art alignment method for making the sum of squares of residuals minimum does not become preferable. The facts that deformation of the wafer passed through various manufacturing processes such as film forming stage or etching or heat treatment processes is complex and such random component does not follow the normal distribution may be frequently generated in the practical manufacturing process of the semiconductor device.
As described above, the related art alignment method in which a sum of squares of the residual is made minimum in order to make a minimum displacement between the position of the pattern to be formed in itself and the position of the pattern to be actually formed does not always provide the most preferable correcting condition of the alignment for the VLSI passed through various processes. This becomes remarkable in particular in the case that the random component in the displacement component of the alignment marks from the rational grid point does not follow a normal distribution.